The present invention relates to semiconductor switching devices, such as thyristor devices, for example thyristor devices of the distributed or disseminated gate type or gate turn off (G.T.O.) thyristor devices.
Many prior art G.T.O. thyristor devices use a construction similar to that shown in section in FIG. 1. The principal features are, in a silicon disc 1, a p-diffused base region 2 (for example 50 .mu.m thick) forming a planar junction 3 with a high resistivity n-base region 4 (for example about 450 .mu.m thick). Channels 5 are etched into the p-base region 2 to leave raised islands 6 which are doped by a second diffusion to form n-type cathode emitter regions 7. The depth of the junctions 8 between regions 2 and 7 is important for two reasons:
(a) It must be arranged that the total dopant content of zones 2a (the zones of p-base region 2 underlying the cathode emitter regions 7) is held within a specific range; and
(b) The dopant concentration in p-base region 2 adjacent each junction 8 must everywhere lie within specific limits to determine the reverse breakdown voltage of each junction 8 within an acceptable range. Ideally, junction breakdown should not occur along the lines of emergence 8a of junctions 8 at the silicon surface.
In an alternative form of prior art, a planar device as shown in FIG. 2 (in which items which correspond with items in FIG. 1 have the same reference numerals as in FIG. 1), omits the etched-out channels 5, so that outer surfaces 7a of cathode emitter regions 7 are coplanar with outer surface 9 of the p-diffused base region 2 (for example about 70 .mu.m thick, the region 4 being for example about 450 .mu.m thick). The p-base region 2 is provided with a reduced dopant concentration towards its outer surface 9. As a consequence, any breakdown of each junction 8 occurs within the bulk of the silicon around the locus 2 m of maximum base dopant concentration, though modified slightly by junction curvature effects.
In either prior art case, the silicon surface may be provided with an oxide coating in the vicinity of each junction emergence line 8a for reasons of protection and stability.
In the turn-off mode of operation of the device of FIG. 1, negative voltage is applied to each electrode 10 lying in electrical contact with the surface of p-base region 2, with respect to a cathode terminal plate 11 which contacts all of electrodes 11a which are in electrical contact with the outer surfaces of cathode emitter regions 7. This causes extraction of positive carriers (holes) from the p-base region 2 through electrodes 10 and correspondingly suppresses injection of negative carriers (electrons) from the cathode emitter regions 7 into p-base region 2. The negative voltage applied to electrodes 10 appears initially for the most part as a voltage drop across the lateral resistance 2r of region 2 between the zones 2a and the contact surfaces 10a of electrodes 10 and later, as the anode current density subsides, as a reverse bias (which may be limited by its avalanche breakdown voltage) at the junctions 8.
In practice, it has been found that the turn-off capability is significantly influenced by the uniformity of the lateral base resistance 2r, which in turn is a function, inter alia, of the uniformity obtained in the depth to which the channels 5 are etched. It is also desirable that the effective value of resistance 2r is kept to a minimum, thus causing minimum impediment to the extraction of positive carriers from region 2.
Further, the uniformity of efficiency of contact at each surface 10a between electrodes 10 and the p-base region 2 is of similar importance, i.e. the contact resistance should be both uniform and minimal.
In practice, it is found that variation in the depths of channels 5 across the diameter of a disc causes non-uniformity of both the lateral resistance 2r and the efficiency of contact at surfaces 10a, with corresponding degradation of device performance compared to the optimum. The problems of uniformity become progressively more acute as device diameters are increased. Selective shallow p-type diffusion of relatively high surface concentration may be introduced into those parts of the surface of p-base region 2 directly underlying the contacts 10 to reduce and regulate the contact resistance at the cost of an additional process stage but is only a partial solution to the whole problem.
The device of FIG. 2 solves some of the problems of uniformity found in the device of FIG. 1 but at the cost of increased complexity in selectively contacting coplanar surface regions.
As prior art there may also be mentioned GB-A- 2 082 836, which discloses a semiconductor device, for example a p-i-n diode or a thyristor, which comprises a corrugated semiconductor body having a plurality of complementary grooves and ridges on opposite sides of the body. In the case of a p-i-n diode, the junction between the p-type region and intrinsic region extends substantially parallel to one surface, while the junction between the n-type region and the intrinsic region extends substantially parallel to the other surface. The object is to make the diode thinner without sacrificing strength and rigidity and to increase the active area and so the current handling capability. To avoid premature breakdown, the diode is surrounded by a thicker peripheral portion. In the case of a thyristor, there are p-n junctions, parallel electrodes and an annular electrode separated by insulation.